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MC14549B, MC14559B Successive Approximation Registers The MC14549B and MC14559B successive approximation registers are 8­bit registers providing all the digital control and storage necessary for successive approximation analog­to­digital conversion systems. These parts differ in only one control input. The Master Reset (MR) on the MC14549B is required in the cascaded mode when more than 8 bits are desired. The Feed Forward (FF) of the MC14559B is used for register shortening where End­of­Conversion (EOC) is required after less than eight cycles. Applications for the MC14549B and MC14559B include analog­to­digital conversion, with serial and parallel outputs. http://onsemi.com MARKING DIAGRAMS 16 PDIP­16 P SUFFIX CASE 648 MC145xxBCP AWLYYWW 1 · · · · · · · · · · Totally Synchronous Operation All Outputs Buffered Single Supply Operation Serial Output Retriggerable Compatible with a Variety of Digital and Analog Systems such as the MC1408 8­Bit D/A Converter All Control Inputs Positive­Edge Triggered Supply Voltage Range = 3.0 Vdc to 18 Vdc Capable of Driving 2 Low­Power TTL Loads, 1 Low­Power Schottky TTL Load or 2 HTL Loads Over the Rated Temperature Range Chip Complexity: 488 FETs or 122 Equivalent Gates xx A WL, L YY, Y WW, W Unit V V mA mW °C °C 16 SOIC­16 DW SUFFIX CASE 751G 1 145xxB AWLYYWW MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.) Symbol VDD Vin Iin PD TA Tstg Parameter DC Supply Voltage Range Input Voltage Range, All Inputs DC Input Current, per Pin Power Dissipation, per Package (Note 2.) Operating Temperature Range Storage Temperature Range Value ­0.5 to +18.0 ­0.5 to VDD + 0.5 ±10 500 ­55 to +125 ­65 to +150 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device MC14549BCP MC14549BDWR2 MC14559BCP MC14559BDWR2 Package PDIP­16 SOIC­16 PDIP­16 SOIC­16 Shipping 25/Rail 1000/Tape & Reel 25/Rail 1000/Tape & Reel 1. Maximum Ratings are those values beyond which damage to the device may occur. 2. Temperature Derating: Plastic "P and D/DW" Packages: ­ 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high­impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). © Semiconductor Components Industries, LLC, 2000 1 August, 2000 ­ Rev. 4 Publication Order Number: MC14549B/D MC14549B, MC14559B PIN ASSIGNMENT Q4 Q5 Q6 Q7 Sout D C VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD Q3 Q2 Q1 Q0 EOC * SC *For MC14549B Pin 10 is MR input. For MC14559B Pin 10 is FF input. MC14549B SC SC(t­1) MR MR(t­1) Clock X X 1 1 1 0 X X 0 X 1 X X 1 0 0 0 0 X X 0 1 0 X TRUTH TABLES Action None Reset Start Conversion Start Conversion Continue